...
机译:通过使用负性显影光刻和蚀刻光刻图案,实现具有自对准的56 nm节距的铜双大马士革互连
STMicroelectronics, 257 Fuller Rd, IBM suites, Albany, NY 12203, United States;
STMicroelectronics, 257 Fuller Rd, IBM suites, Albany, NY 12203, United States;
IBM Albany Nanotech, 257 Fuller Rd, IBM suites, Albany, NY 12203, United States;
IBM Albany Nanotech, 257 Fuller Rd, IBM suites, Albany, NY 12203, United States;
IBM Albany Nanotech, 257 Fuller Rd, IBM suites, Albany, NY 12203, United States;
IBM Albany Nanotech, 257 Fuller Rd, IBM suites, Albany, NY 12203, United States;
IBM Albany Nanotech, 257 Fuller Rd, IBM suites, Albany, NY 12203, United States;
Toshiba America Electronic Components Inc., 257 Fuller Rd, Albany, NY 12203, United States;
IBM Albany Nanotech, 257 Fuller Rd, IBM suites, Albany, NY 12203, United States;
IBM Albany Nanotech, 257 Fuller Rd, IBM suites, Albany, NY 12203, United States;
IBM Albany Nanotech, 257 Fuller Rd, IBM suites, Albany, NY 12203, United States;
STMicroelectronics, 257 Fuller Rd, IBM suites, Albany, NY 12203, United States;
IBM Albany Nanotech, 257 Fuller Rd, IBM suites, Albany, NY 12203, United States;
IBM Albany Nanotech, 257 Fuller Rd, IBM suites, Albany, NY 12203, United States;
Lithography-Etch-Lithography-Etch; Hard-mask removal; BEOL; Profile optimization; 56 nm;
机译:具有EUV自对准双重图案化的关键亚30纳米间距Mx电平图案化的自对准阻挡集成演示
机译:具有短TAT硅烷化多孔二氧化硅的32-nm节点超低-$ k $ / Cu双金属镶嵌互连的总性能$(k = hbox {2.1})$
机译:铜双大马士革互连的性能,使用基于Ti的自形成薄壁垒层用于28 nm节点及更高
机译:56nm间距低k / Cu双镶嵌互连与侧壁图像传输(SIT)图案化方案集成
机译:在无铅组装环境中开发小间距(0.4 mm)层叠封装器件的组装工艺。
机译:IFT56通过维持IFTB复合体的完整性和睫状微管结构来调节脊椎动物的发育模式
机译:在Via-Below和Via-above Cu双镶嵌互连中的致命空隙尺寸比较