PRINCIPLES OF CONSTRUCTING FAILURE-RESISTANT MEASUREMENT TECHNOLOGY MICROPROCESSOR DEVICES WITH a posteriori CORRECTION OF Multiple errors (DISCUSSION)

摘要

A method is considered for ensuring failure-resistant operation of computer memory devices which is based on linear correcting codes with a posteriori correction of multiple errors of multiple errors. The proposed method makes it possible to extend the correcting possibilities of the code, i.e., to determine the configuration of any error with minimum code requirements, requirements of hardware and time.