An evolutionary algorithm-based approach to robust analog circuit design using constrained multi-objective optimization

摘要

The increasing complexity of circuit design needs to be managed with appropriate optimization algorithms and accurate statistical description of design models in order to reach the design specifics, guaranteeing "zero defects". In the Design for Yield open problems are the design of effective optimization algorithms and statistical analysis for yield design, which require time consuming techniques. New methods have to balance accuracy, robustness and computational effort. Typical analog integrated circuit optimization problems are computationally hard and require the handling of multiple, conflicting, and non-commensurate objectives having strong nonlinear interdependence. This paper tackles the problem by evolutionary algorithms to produce tradeoff solutions on the Pareto Front. In this research work Integrated Circuit (IC) design has been formulated as a constrained multi-objective optimization problem defined in a mixed integer/discrete/continuous domain. The following real-life circuits, RFLow Noise Amplifier, Leapfrog Filter, and Ultra Wideband LNA, were selected as test bed. The proposed algorithm, A-NSGAII, was shown to produce acceptable and robust solutions in the tested applications, where state-of-art algorithms and circuit designers failed. The results show significant improvement in all the chosen IC design problems.