首页> 外文期刊>Journal of Vacuum Science & Technology. B, Microelectronics and Nanometer Structures >Molecular-beam epitaxy growth of device-compatible GaAs on silicon substrates with thin (~80 nm) Si_(1-x)Ge_x step-graded buffer layers for high-κ Ⅲ-Ⅴ metal-oxide-semiconductor field effect transistor applications
【24h】

Molecular-beam epitaxy growth of device-compatible GaAs on silicon substrates with thin (~80 nm) Si_(1-x)Ge_x step-graded buffer layers for high-κ Ⅲ-Ⅴ metal-oxide-semiconductor field effect transistor applications

机译:器件兼容的砷化镓在具有薄(〜80 nm)Si_(1-x)Ge_x台阶缓变缓冲层的硅衬底上的分子束外延生长,用于高κⅢ-Ⅴ型金属氧化物半导体场效应晶体管的应用

获取原文
获取原文并翻译 | 示例
           

摘要

The authors report the fabrication of TaN-HfO_2-GaAs metal-oxide-semiconductor capacitors on silicon substrates. GaAs was grown by migration-enhanced epitaxy (MEE) on Si substrates using an ~80-nm-thick Si_(1-x)Ge_x step-graded buffer layer, which was grown by ultrahigh vacuum chemical vapor deposition. The MEE growth temperatures for GaAs were 375 and 400℃, with GaAs layer thicknesses of 15 and 30 nm. We observed an optimal MEE growth condition at 400℃ using a 30 nm GaAs layer. Growth temperatures in excess of 400℃ resulted in semiconductor surfaces rougher than 1 nm rms, which were unsuitable for the subsequent deposition of a 6.5-nm-thick HfO_2 gate dielectric. A minimum GaAs thickness of 30 nm was necessary to obtain reasonable capacitance-voltage (C-V) characteristics from the GaAs layers grown on Si substrates. To improve the interface properties between HfO_2 and GaAs, a thin 1.5 nm Ge interfacial layer was grown by molecular-beam epitaxy in situ after the GaAs growth. The Ge-passivated GaAs samples were then transferred in air for the subsequent ex situ HfO_2 formation. This Ge interfacial layer in between HfO_2 and GaAs was necessary to avoid relatively flat C-V characteristics that are symptomatic of high interface state densities.
机译:作者报告了在硅衬底上制造TaN-HfO_2-GaAs金属氧化物半导体电容器的过程。 GaAs是通过迁移增强外延(MEE)在Si衬底上生长的,厚度约为80nm,并通过超高真空化学气相沉积法生长了Si_(1-x)Ge_x台阶梯度缓冲层。 GaAs的MEE生长温度为375和400℃,GaAs层厚度为15和30 nm。我们使用30 nm GaAs层在400℃观察到了最佳的MEE生长条件。超过400℃的生长温度导致半导体表面的粗糙度大于1 nm rms,不适合随后沉积6.5 nm厚的HfO_2栅极电介质。为了使Si衬底上生长的GaAs层获得合理的电容-电压(C-V)特性,必须有30 nm的最小GaAs厚度。为了改善HfO_2与GaAs之间的界面性质,在GaAs生长后,通过分子束外延原位生长了1.5 nm Ge薄界面层。然后将Ge钝化的GaAs样品转移到空气中,用于随后的非原位HfO_2形成。 HfO_2和GaAs之间的Ge界面层对于避免相对平坦的C-V特性是必要的,这些特性是高界面态密度的征兆。

著录项

相似文献

  • 外文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号