Amplified double recirculating delay line using a 3/spl times/3 coupler

摘要

We propose the use of a 3/spl times/3 coupler as a signal divider to implement an amplified double recirculating delay line. We describe the circuit layout and provide a subsequent analysis leading to the computation of its transfer function under general arbitrary conditions. The different conditions in which the structure can be operated, their effect on the overall transfer function, and stability conditions are also addressed. The use of the amplified double recirculating delay line as a building block to implement more complex filters is also considered.