...
首页> 外文期刊>Journal of Electronic Packaging >Overview and Outlook of Three-Dimensional Integrated Circuit Packaging, Three-Dimensional Si Integration, and Three-Dimensional Integrated Circuit Integration
【24h】

Overview and Outlook of Three-Dimensional Integrated Circuit Packaging, Three-Dimensional Si Integration, and Three-Dimensional Integrated Circuit Integration

机译:三维集成电路封装,三维硅集成和三维集成电路集成的概述和展望

获取原文
获取原文并翻译 | 示例
           

摘要

3D integration consists of 3D integrated circuit (IC) packaging, 3D Si integration, and 3D IC integration. They are different and in general the through-silicon via (TSV) separates 3D IC packaging from 3D Si/IC integrations since the latter two use TSV but 3D IC packaging does not. 3D Si integration and 3D IC integration are different. 3D IC integration stacks up the thin chips with TSV and microbump, while 3D Si integration stacks up thin wafers with TSV alone (i.e., bumpless). TSV is the heart of 3D Si/IC integrations and is the focus of this investigation. Also, the state-of-the-art, challenge, and trend of 3D integration will be presented and examined. Furthermore, supply chain readiness for high volume manufacturing (HVM) of TSVs is discussed.
机译:3D集成包括3D集成电路(IC)封装,3D Si集成和3D IC集成。它们是不同的,并且一般而言,硅通孔(TSV)将3D IC封装与3D Si / IC集成分开,因为后两者使用TSV,而3D IC封装则不使用。 3D Si集成和3D IC集成是不同的。 3D IC集成使用TSV和微凸块堆叠薄芯片,而3D Si集成仅使用TSV(即无凸点)堆叠薄晶片。 TSV是3D Si / IC集成的核心,并且是此研究的重点。此外,还将介绍和检查3D集成的最新技术,挑战和趋势。此外,还讨论了TSV的大批量制造(HVM)的供应链准备情况。

著录项

  • 来源
    《Journal of Electronic Packaging》 |2014年第4期|040801.1-040801.15|共15页
  • 作者

    John H. Lau;

  • 作者单位

    ASM Pacific Technology, 16-22 Kung Yip Street, Kwai Chung, NT, Hong Kong;

  • 收录信息
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号