机译:采用待机开关的带开关晶体管逻辑的双阈值电压多米诺振荡器设计,可降低亚阈值漏电流
School of Physics and Electronics Information GanNan Normal University, Economic and High-Tech., Development Zone, Ganzhou, JiangXi 34100, China;
School of Physics and Electronics Information GanNan Normal University, Economic and High-Tech., Development Zone, Ganzhou, JiangXi 34100, China;
Domino logic; pass transistor logic; arithmetic circuits; dual threshold voltage; low power; carry look-ahead adder; CMOS technologies; dynamic circuits; idle mode; standby switch; sub-threshold leakage currents; reduced standby leakage current;
机译:采用备用开关的双阈值电压多米诺逻辑设计的传输晶体管,可降低亚阈值泄漏电流
机译:睡眠开关双阈值电压多米诺逻辑,具有降低的待机泄漏电流
机译:睡眠开关双阈值电压多米诺逻辑,具有降低的待机泄漏电流
机译:使用基于读出放大器的传输晶体管逻辑进行多位加法器设计,以实现接近阈值的电压操作
机译:超低压亚阈值电路的设计技术和片上可靠性监控
机译:具有减小的待机漏电流的睡眠开关双阈值电压Domino逻辑
机译:多点室温下的阈值电压改善和栅极漏电流降低操作单电子晶体管(RT-sET)