Simple implementation of control gate signals for the interleaved LLC resonant converter for high current application

摘要

A novel method of the gate signal generation for the interleaved LLC converter is proposed, which is based on the relationship between the output signal of a toggle flip-flop having the double period of the input clock signal and the output gate signal of the LLC controller having almost half-duty cycle. The gate signals for the master and slave converters are generated using the rising and falling edge instants from the original control gate signal of the controller, respectively. Therefore, the required 90° phase difference between two signals can be always kept at any instant and at any output load condition.