Asymmetrical multilevel inverter topology with low total standing voltage and reduced switches count

摘要

This paper presented an improved asymmetrical multilevel inverter module with reduced switches count. The basic module is capable of producing 15 level outputs with four dc sources and 10 switches. The proposed topology has an inherent ability to generate negative voltage levels, made it possible to utilize lower rating switches, and has lower total standing voltage. To have more number of levels, a series-connected cascade extension of the module has been done. The three different algorithms for selecting the magnitude of dc sources are proposed. The generalized relations for different parameters are based on the number of added basic units and the number of presented levels for each source selection algorithm. Nearest level control (NLC) is used as the modulation technique. A comparative study shows that the developed topology outperformed other selected existing topologies on many parameters. The performance of the module is evaluated through detailed simulation and power loss analysis. Accuracy of the obtained simulation results is validated through proper experimental testing of the circuit in the laboratory.