Run-time demand estimation and modulation of on-chip decaps at system level for leakage power reduction in multicore chips

摘要

The leakage power of decaps occupies a large portion of total chip leakage power. In this paper we propose an approximate approach to estimate the amount of the required "on" capacitance of each decap at runtime to achieve runtime decap modulation in multicore chips, and further develop two techniques (incremental calculation and sparsification) to improve the approximate approach. Results on a set of benchmarks show that our approach can achieve about 45% saving in decap leakage on average, and the approximate approach can further reduce the computation cost by up to 22x with accuracy loss of less than 1%.