A New General Multilevel Converter Topology Based on Cascaded Connection of Submultilevel Units With Reduced Switching Components, DC Sources, and Blocked Voltage by Switches

摘要

A new cascade topology for multilevel converter is introduced in this paper which comprises series connection of several submultilevel units. To determine the magnitudes of the dc sources, two new methods are described. The proposed topology is optimized to generate any levels with minimum number of components and peak voltage on switches. The presented topology can be used in high-voltage applications due to using the switches with low voltage rating. To indicate the merits of the proposed structure, comparison studies are provided with other topologies in terms of the number of elements and peak voltage on switches. The comparison results prove that the presented cascade multilevel converter requires fewer components. Moreover, it is shown that the total peak voltage on switches in the proposed topology is less than other structures. Experimental work is presented to demonstrate the performance of the presented multilevel converter.