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Ultralow Input–Output Capacitance PCB-Embedded Dual-Output Gate-Drive Power Supply for 650 V GaN-Based Half-Bridges

机译:超低输入-输出电容PCB嵌入式双输出栅极驱动电源,用于650 V GaN基半桥

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Wide-bandgap devices have been widely used to reduce the size and increase the efficiency of power converters by operating at a high switching frequency, at the expense of heightened radiated and conducted electromagnetic inference (EMI) emissions, of which the latter circulates through the power loop and ancillary circuitry. In effect, the parasitic isolation capacitance$C_{i}$of the gate-driver power supply represents a key EMI propagation path to be controlled in order to ensure the operational integrity of power converters. To this end, this paper proposes an integrated, dual-output gate-drive power supply for gallium-nitride (GaN) 650 V, 60 A, half-bridge phase legs, rated at 2 W (2 × 1 W), 15 to 2 × 7 V, featuring an ultralow$C_{i}$of 1.6 pF, an output-to-output parasitic capacitance of 1.6 pF, a power density of 72 W/in3, and an efficiency of 85%. All this is attained using an active-clamp flyback converter switching at 1 MHz using 65 V GaN high-electron-mobility transistor devices and Schottky output rectifiers, and a Pareto-optimized transformer design minimizing its interwinding capacitances, volume, and losses. Finally, the transformer is fully embedded in a printed circuit board (PCB) material, doubling as a substrate for the topside active layer of the power supply. The paper presents the complete design procedure, processing, and experimental demonstration of the proposed integrated power supply, evaluating as well the reliability impact of the magnetic-PCB material interface in high ambient temperature applications (>200 °C).
机译:宽带隙器件已被广泛用于通过在高开关频率下工作来减小功率转换器的尺寸并提高其效率,但其代价是辐射和传导电磁干扰(EMI)的发射增加,后者通过电源循环回路和辅助电路。实际上,寄生隔离电容 n <在线公式xmlns:mml = “ http://www.w3.org/1998/Math/MathML ” xmlns:xlink =“ http://www.w3”。 org / 1999 / xlink “> $ C_ {i} $ n栅极驱动器电源代表关键的EMI为了确保功率转换器的操作完整性,必须控制传播路径。为此,本文提出了一种用于氮化镓(GaN)650V,60A半桥相脚的集成双输出栅极驱动电源,额定功率为2W(2×1 W),15至2×7 V,具有超低 n $ C_ {i} $ n为1.6 pF,输出到输出寄生电容为1.6 pF,功率密度为72 W / in n 3,效率为85 %。所有这些都是通过使用65V GaN高电子迁移率晶体管器件和肖特基输出整流器以1 MHz进行开关的有源钳位反激转换器以及帕累托优化的变压器设计来实现的,该变压器设计将绕组间电容,体积和损耗降至最低。最后,变压器完全嵌入印刷电路板(PCB)材料中,并兼作电源顶侧有源层的基板。本文介绍了拟议的集成电源的完整设计过程,处理和实验演示,并评估了高环境温度应用(> 200°C)中磁性PCB材料接口的可靠性影响。

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