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机译:使用拆分CDAC系数乘数,低功耗,高线性宽带3.25 GS / S四阶可编程模拟FIR滤波器
Virginia Tech Dept Elect & Comp Engn Blacksburg VA 24061 USA|Qualcomm Atheros San Jose CA 95110 USA;
Virginia Polytech Inst & State Univ Bradley Dept Elect & Comp Engn Blacksburg VA 24061 USA|Intel Corp Hillsboro OR 97124 USA;
Virginia Polytech Inst & State Univ Bradley Dept Elect & Comp Engn Blacksburg VA 24061 USA|Lockheed Martin Moorestown NJ 08057 USA;
Virginia Tech Dept Elect & Comp Engn Arlington VA 22203 USA|Univ Massachusetts Coll Engn Amherst MA 01003 USA;
Analog FIR filter; analog signal processing; charge-scaling DAC; discrete-time domain signal processing (DT-ASP); programmable filter; split-CDAC (split CDAC); time-interleaved operation;
机译:可重构FIR滤波器中低功耗操作的系数乘数驱动扰动
机译:具有固定RADIX-8对称系数的FIR滤波器:设计和无乘数实现
机译:周期性时变三进制系数的无乘数FIR滤波器的设计和架构
机译:使用分离CDAC系数乘法器的低功耗3.25GS / s 4 阶可编程模拟FIR滤波器,用于宽带模拟信号处理
机译:低功耗Multi-GS / s模数转换器的设计技术。
机译:使用跨导电容器模拟FIR电源的低功耗高度选择性通道滤波