机译:利用基于电压的65nm CMOS电压组合功率的60GHz高输出功率堆叠FET功率放大器的设计
Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan;
Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan;
Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan;
Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan;
Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan;
Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan;
Power generation; Impedance; Field effect transistors; Logic gates; Power combiners; Loss measurement;
机译:基于超材料的零相移器的二维分布式功率组合,用于65 nm CMOS中的60 GHz功率放大器
机译:基于宽带变压器的功率放大器在65-NM CMOS过程中实现24.5 dBm输出功率超过24-41 GHz
机译:具有65 nm CMOS的基于变压器的功率合成器的60 GHz 14 dBm功率放大器
机译:LTE功率放大器应用中基于65 nm CMOS变压器的阻抗匹配设计
机译:基于Wilkinson Combiner方法的130nm CMOS技术中10GHz RF功率放大器设计
机译:用于无线供电的神经接口系统的薄膜柔性天线和硅CMOS整流器芯片的协同设计方法和晶圆级封装技术
机译:A 25.1 DBM 25.9-DB增益25.4%PAE X波段功率放大器利用65-NM CMOS中的电压组合变压器