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首页> 外文期刊>IEEE transactions on circuits and systems . I , Regular papers >Fixed-Complexity Tree Search Schemes for Detecting Generalized Spatially Modulated Signals: Algorithms and Hardware Architectures
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Fixed-Complexity Tree Search Schemes for Detecting Generalized Spatially Modulated Signals: Algorithms and Hardware Architectures

机译:固定复杂性树搜索方案用于检测广义空间调制信号:算法和硬件架构

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In the generalized spatial modulation (GenSM) multiple input multiple output (MIMO) system, each block of data bits is mapped to a set of spatially multiplexed (SMX) symbols and an index of transmit antenna combination (TAC) of active antennas. The difficulty for the GenSM MIMO receiver is to detect the SMX symbols and TAC index simultaneously. Recently, we applied the conventional sphere decoding algorithm (SDA) successively to achieve the exact maximum likelihood detection (MLD) of GenSM MIMO signals. The SDA scheme suffers from variable computational complexity and leads to hardware detectors with variable throughput rate. Instead, fixed-complexity tree search algorithms, e.g., reduced fixed sphere decoding (rFSD), with nearly MLD performance are employed to facilitate hardware implementation. Here, we propose to apply the rFSD successively and design a hardware architecture for detecting GenSM MIMO signals under the scenario of 5 transmit antennas, 2 transmit radio frequency chains, 4 receive antennas, and 64-QAM SMX symbols. The VLSI implementation results under the TSMC 90nm CMOS technology reveal that our architecture requires 276.7K gates and provides detection throughput 1.613 Gbps, while operating at 322.6 MHz. Compared with other related architectures, our architecture provides higher detection throughput rate and is of better hardware efficiency.
机译:在广义空间调制(Gensm)多输入多输出(MIMO)系统中,将每个数据比特映射到一组空间多路复用(SMX)符号和有源天线的发射天线组合(TAC)的索引。 MIMO接收器的难度是同时检测SMX符号和TAC指数。最近,我们连续地应用了传统的球体解码算法(SDA)以实现Gensm MIMO信号的精确最大似然检测(MLD)。 SDA方案遭受可变计算复杂性,并导致具有可变吞吐率的硬件检测器。相反,使用具有接近MLD性能的固定复杂度树搜索算法,例如,减少了固定球体解码(RFSD),以便于实现硬件实现。这里,我们建议连续应用RFSD,并设计用于检测MIMO信号的硬件架构,用于在5个发射天线的场景下,2发送射频链,4接收天线和64-QAM SMX符号。 TSMC 90nm CMOS技术下的VLSI实施结果表明,我们的架构需要276.7k门,并提供检测吞吐量1.613 Gbps,同时在322.6 MHz。与其他相关架构相比,我们的架构提供了更高的检测吞吐率,并且具有更好的硬件效率。

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