首页> 外文期刊>IEEE Journal on Selected Areas in Communications >Constrained Codes that Mitigate Inter-Cell Interference in Read/Write Cycles for Flash Memories
【24h】

Constrained Codes that Mitigate Inter-Cell Interference in Read/Write Cycles for Flash Memories

机译:在闪存的读/写周期中缓解小区间干扰的受约束代码

获取原文
获取原文并翻译 | 示例
           

摘要

Inter-cell interference (ICI) is one of the main obstacles to precise programming (i.e., writing) of a flash memory. In the presence of ICI, the voltage level of a cell might increase unexpectedly if its neighboring cells are programmed to high levels. For q-ary cells, the most severe ICI arises when three consecutive cells are programmed to levels high - low - high, represented as (q-1)0(q-1), resulting in an unintended increase in the level of the middle cell and the possibility of decoding it incorrectly as a nonzero value. ICI-free codes are used to mitigate this phenomenon by preventing the programming of any three consecutive cells as (q-1)0(q-1). In this work, we extend ICI-free codes in two directions. First, we consider binary balanced ICI-free codes which, in addition to forbidding the 101 pattern, require the number of 0 symbols and 1 symbols to be the same. Using combinatorial methods, we determine the asymptotic information rate of these codes and show that the asymptotic rate loss due to the imposition of the balanced property is approximately 2%. Extensions to q-ary cells, for q>2 are also discussed. Next, we consider q-ary ICI-free write-once-memory (WOM) codes that support multiple writes of a WOM while mitigating ICI effects. These codes forbid the appearance of the (q-1)0(q-1) pattern in any codeword used in any writing step. Using properties of two-dimensional constrained codes and generalized WOMs, we characterize the maximum sum-rate of t-write ICI-free WOM codes or, equivalently, the t-write sum-capacity of an ICI-free WOM.
机译:小区间干扰(ICI)是对闪存进行精确编程(即写入)的主要障碍之一。在ICI存在的情况下,如果将其相邻单元编程为高电平,则单元的电压电平可能会意外增加。对于q元单元,当将三个连续单元编程为高-低-高电平时表示最严重的ICI,表示为(q-1)0(q-1),从而导致中间电平的意外增加单元格以及将其错误地解码为非零值的可能性。无ICI的代码通过防止将任何三个连续单元编程为(q-1)0(q-1)来减轻这种现象。在这项工作中,我们在两个方向上扩展了无ICI代码。首先,我们考虑二进制平衡的无ICI的代码,除了禁止使用101模式外,还要求0个符号和1个符号的数量相同。使用组合方法,我们确定这些代码的渐近信息率,并表明由于施加平衡属性而导致的渐近率损失约为2%。还讨论了q> 2时对q元单元的扩展。接下来,我们考虑支持q进制的无ICI一次写入的内存(WOM)代码,该代码支持对WOM的多次写入,同时减轻了ICI的影响。这些代码禁止在任何写入步骤中使用的任何代码字中出现(q-1)0(q-1)模式。利用二维约束代码和广义WOM的属性,我们可以描述t写入无ICI WOM代码的最大求和率,或者等效地,无ICI的WOM t写入求和能力。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号