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The mechanical generation of fault trees for reactive systems via retrenchment II: clocked and feedback circuits

机译:通过缩减II通过机械方式生成无功系统故障树:时钟和反馈电路

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The retrenchment approach to the mechanical construction of fault trees, introduced in the first paper for combinational logic circuits, is extended to handle clocked circuits and then feedback circuits. The temporal behaviour of clocked circuits is captured using their causal relations, and the potentially unbounded behaviour of cyclic circuits is decomposed into an iteration over their acyclic counterparts. The repercussions of all this for the theory of retrenchment are elaborated. For clocked circuits, the techniques we present allow glitches and other transient errors to be properly described. For feedback circuits, the plethora of behaviours that can occur, give rise to infinitary fault trees of an appropriate kind. All this paves the way for automated fault tree generation for reactive systems.
机译:在第一篇针对组合逻辑电路的论文中介绍了对故障树进行机械构造的缩减方法,该方法被扩展为处理时钟电路,然后处理反馈电路。时钟电路的时间行为是使用它们的因果关系来捕获的,而循环电路的潜在无限制行为则分解为它们的非循环对应项上的迭代。阐述了所有这些对裁员理论的影响。对于时钟电路,我们介绍的技术可以正确描述毛刺和其他瞬态误差。对于反馈电路,可能发生的过多行为会产生适当类型的无限式故障树。所有这些为反应系统自动生成故障树铺平了道路。

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