DIGITAL IMPLEMENTATION OF THIRD HARMONIC DISTORTION REDUCTION IN FOURTH-ORDER ΔΣ D/A CONVERTER

摘要

This paper presents a reduction technique of third harmonic distortion (HD3) in a AS digital-to-analog converter (DAC) for low-power wireless transmitter applications. It has digital-centric circuits, such as ΔΣ modulator as well as a simple digital pre-distortion circuit for HD3 reduction. The experimental results using FPGA reveal the effectiveness of the digital pre-distortion.