Protocol-Aware ATE Digital Instruments

摘要

ATE pattern generators have evolved for more than 30 years. Each new device development has brought about corresponding change in pattern-generator architecture, but the basic architecture has remained largely the same-a large addressable memory used as a truth table to verify digital logic. Until now, the complexity of modern SoC devices has outpaced this evolution. Hardware-based PA pattern generators with powerful software tools are capable of addressing this challenge by improving cost-of-test, quality, and time-to-market.