机译:自下而上的VLSI布局的分层聚集蚂蚁系统
Department of Electrical Engineering, University of Malaya, 50603 Kuala Lumpur, Malaysia;
Department of Electrical Engineering, University of Malaya, 50603 Kuala Lumpur, Malaysia;
Department of Electrical Engineering, University of Malaya, 50603 Kuala Lumpur, Malaysia;
Department of Electrical Engineering, University of Malaya, 50603 Kuala Lumpur, Malaysia;
Department of Electrical Engineering, University of Malaya, 50603 Kuala Lumpur, Malaysia;
Department of Mechanical Engineering, University of Malaya, 50603 Kuala Lumpur, Malaysia;
ant colony optimization; VLSI; floorplanning; bottom-up hierarchy;
机译:自下而上的基于层次的VLSI布局设计中的成本降低
机译:用于VLSI放置的映射和分层自组织神经网络
机译:使用蚁群优化的VLSI电路划分来产生可容错的可测试系统
机译:基于蚁群优化算法的VLSI放置问题
机译:蚁群优化,用于联合解决分层无线传感器网络中的中继节点放置和轨迹计算。
机译:基于分层聚类的最优PMU放置以实现电力系统故障可观察性
机译:考虑解决方案空间分层结构的遗传算法的VLSI放置方法
机译:用于由直线宏单元组件构成的VLsI的布局和布线系统