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Negative Capacitance FinFET With Sub-20-mV/decade Subthreshold Slope and Minimal Hysteresis of 0.48 V

机译:负电容FinFET,具有低于20mV /十年的亚阈值斜率和0.48 V的最小滞后

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摘要

In this letter, an n-type short-channel negative capacitance FinFET (NC-FinFET) with a hysteresis window of 0.48 V, an on-/off-current ratio of 107, and a sub20-mV/decade average subthreshold slope (SSavg) that is intended to overcome the Boltzmann limit (i.e., the physical limit in the SS, which is 60 mV/decade at 300 K), is experimentally demonstrated vs. a baseline FinFET with an SSavg of ~105 mV/decade. In our testing, we confirmed that the large hysteresis window in a short-channel NC-FinFET can be suppressed by using an appropriate source/drain extension length (Lext). As Lext in the NC-FinFET is increased, the gate-to-source/drain capacitance (CGS/CGD) decreased and the hysteresis window narrows.
机译:在这封信中,介绍了一种n型短沟道负电容FinFET(NC-FinFET),其滞后窗为0.48 V,开/关电流比为107,并且低于20 mV /十年的平均亚阈值斜率(SSavg )旨在克服玻耳兹曼极限(即SS中的物理极限,即300 K下为60 mV /十倍),相对于SSavg为〜105 mV /十倍的基线FinFET进行了实验证明。在我们的测试中,我们确认可以通过使用适当的源/漏扩展长度(Lext)来抑制短通道NC-FinFET中的大滞后窗口。随着NC-FinFET中的Lext的增加,栅极至源极/漏极电容(CGS / CGD)减小,并且磁滞窗口变窄。

著录项

  • 来源
    《Electron Device Letters, IEEE》 |2017年第4期|418-421|共4页
  • 作者单位

    Department of Electrical and Computer Engineering, University of Seoul, Seoul, South Korea;

    Department of Electronics and Information Engineering, ICT Convergence Technology for Health and Safety, Korea University, Seoul, South Korea;

    Department of Electrical and Computer Engineering, University of Seoul, Seoul, South Korea;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    Capacitance; FinFETs; Hysteresis; Capacitors; Logic gates; Switches;

    机译:电容;FinFET;磁滞;电容器;逻辑门;开关;

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