Ddr-differential-clock Source On Soc Drives Two Ddr-memory Chips

摘要

Many system engineers assume that a differential-clock source should drive just one chip. If a system design requires driving two DDR-memory chips, however, the design would inevitably need a differential-clock buffer. This Design Idea describes a circuit that drives two DDR chips without a clock-source buffer yet does not sacrifice much of the signal integrity. The cost-saving nature of an SOCrn(system-on-chip) design dictates the need for fewer pins. Such designs typically have only one pair of differential signals available for external-memory-chip connection. When the system design requires more than one DDR chip, designers typically use a clock buffer.