Adaptive cascaded Delayed Signal Cancellation PLL for three-phase grid under unbalanced and distorted condition

摘要

Grid synchronization is an important part in monitoring, accessing, and automatically controlling the grid-connected generators and other power electronic converters. The phase of fundamental frequency needs to be tracked in real-time to control energy delivery. However during normal operation the waveforms' frequency, magnitude, and symmetry are varying due to load change, distortions generated by certain electrical power devices and the occurrence of faults. In this paper, an efficient and fast synchronization scheme based on Delayed Signal Cancellation (DSC) for harmonics rejection purposes has been proposed for extracting the fundamental signal. Also, a detailed alpha beta-frame Cascade DSC (alpha beta CDSC) analysis is presented and an alpha beta CDSC-PLL scheme with fast dynamic response under transients is proposed. Based on the proposed PLL, an adaptive control loop is also developed to improve disturbance resistance during faults. Both simulation and real-time hardware-in-the-loop (HIL) experiments are used to verify the unbalance resistance, distortion rejection as well as performance improvement of the two proposed alpha beta CDSC-PLL schemes.