Serial Hardware Implementation of the MFCC and MLP Architecture on FPGA Circuit

摘要

Most audio processing algorithms require complex mathematical operations and a massive amount of data which are often performed in real time. Our robotic application requires complex algorithms such as MFCC, ANN (Artificial Neural Networks) and voice database. It must therefore use a fast and efficient electronic system, for that we used a processor NIOSII based FPGA to implement materially MLP and perform voice recognition functions in real time. Moreover, it is now possible to modify the internal architecture of FPGAs to create one or more central processors (NIOSII). FPGAs now offer low-cost, flexible implementation, fast and convenient with a reduction in energy consumption for many digital systems which are based on NIOSII.