空间飞行器数字系统主要由FPGA、CPU等数字器件构成，由于其工作在含有大量辐射粒子的宇宙环境下，单粒子翻转等软错误对飞行器的安全性、可靠性造成了很大威胁，造成导航、测控以及通讯等功能的失效。特别是随着COTS器件越来越多地应用到数字系统中，亟需建立全面并准确检测出整个飞行器软错误的方法。论文结合Xilinx公司的XC5VFX130T SRAM型FPGA和TI公司的TMS570LS3137型号CPU器件构建的测试系统，设计了监控FPGA和上位机之间的通讯协议，开展了上位机软件设计与实现。 The digital system of space vehicle is mainly composed of FPGA, CPU and other digital devices. Because it works in the space environment with a large number of radiation particles, single particle flip and other soft errors pose a great threat to the safety and reliability of the vehicle, resulting in the failure of navigation, measurement and control, communication and other functions. Especially with the increasing application of COTS devices in digital systems, it is urgent to establish a comprehensive and accurate method to detect the whole aircraft soft errors. This paper takes XC5VFX130T SRAM FPGA of Xilinx Company and TMS570LS3137 CPU of TI Company and their digital system as objects, designs the communication protocol between the monitoring FPGA and the upper computer based on the test system, and then the host computer software is implemented.
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机译：空间飞行器数字系统主要由FPGA、CPU等数字器件构成，由于其工作在含有大量辐射粒子的宇宙环境下，单粒子翻转等软错误对飞行器的安全性、可靠性造成了很大威胁，造成导航、测控以及通讯等功能的失效。特别是随着COTS器件越来越多地应用到数字系统中，亟需建立全面并准确检测出整个飞行器软错误的方法。论文结合Xilinx公司的XC5VFX130T SRAM型FPGA和TI公司的TMS570LS3137型号CPU器件构建的测试系统，设计了监控FPGA和上位机之间的通讯协议，开展了上位机软件设计与实现。 The digital system of space vehicle is mainly composed of FPGA, CPU and other digital devices. Because it works in the space environment with a large number of radiation particles, single particle flip and other soft errors pose a great threat to the safety and reliability of the vehicle, resulting in the failure of navigation, measurement and control, communication and other functions. Especially with the increasing application of COTS devices in digital systems, it is urgent to establish a comprehensive and accurate method to detect the whole aircraft soft errors. This paper takes XC5VFX130T SRAM FPGA of Xilinx Company and TMS570LS3137 CPU of TI Company and their digital system as objects, designs the communication protocol between the monitoring FPGA and the upper computer based on the test system, and then the host computer software is implemented.
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