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The Design of IP Core for LCD Controller Based on SOPC

机译:基于SOPC的LCD控制器IP核的设计。

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In this paper, it introduces the design and implementation of custom IP core for liquid crystal display (LCD) controller based on system on a programmable chip (SOPC) technology and Verilog hardware description language (HDL). The IP core can be put up as a general-purpose peripheral module to the Avalon Bus, communicating with the NIOS II through registers, and the underlying sequential logic for communicating with the external LCD liquid crystal module is automatically completed by the module. The driver does not need to care about the details of the underlying timing, it only needs to implement the read and write operations of the LCD data through register access, thus achieve the purpose of controlling the display content of the LCD. In addition to reducing the complexity of driver development, the design can also take full advantage of the parallel operation of hardware logic to improve the execution efficiency of the entire system and the throughput of processing tasks, especially in some occasions where high-speed image real-time processing is required. Simulations and experiments show that the IP core for LCD controller has good stability, versatility and compatibility.
机译:本文介绍了基于可编程芯片系统(SOPC)技术和Verilog硬件描述语言(HDL)的液晶显示(LCD)控制器定制IP内核的设计和实现。 IP内核可以作为通用外围模块安装到Avalon总线,并通过寄存器与NIOS II进行通信,并且与该外部LCD液晶模块进行通信的底层顺序逻辑将由该模块自动完成。驱动程序不需要关心底层时序的细节,只需要通过寄存器访问来实现LCD数据的读写操作,从而达到控制LCD显示内容的目的。除了降低驱动程序开发的复杂度之外,设计还可以充分利用硬件逻辑的并行操作来提高整个系统的执行效率和处理任务的吞吐量,特别是在某些情况下,需要时间处理。仿真和实验表明,用于LCD控制器的IP内核具有良好的稳定性,多功能性和兼容性。

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