UART Serial Communication Module Design and Simulation Based on VHDL

摘要

UART (Universal Asynchronous Receiver Transmitter) is a kind of serial communication protocol; mostly used for short-distance, low speed, low-cost data exchange between computer and peripherals. During the actual industrial production, sometimes we do not need the full functionality of UART, but simply integrate its core part. UART includes three kernel modules which are the baud rate generator, receiver and transmitter. The UART implemented with VHDL language and simulated using XILINX ISE12.1 to achieve compact, stable and reliable data transmission. It's significant for the design of SOC. The simulation results are completely consistent.