One of the most growing areas in circuit design is asynchronous circuit’s design. These circuits incorporate a number of hazard problems such as race. The multitude of the different techniques that have been proposed to avoid race problems in an asynchronous circuit can be classified into two major types: The techniques belonging to the first type yield large circuits with low power dissipation and the techniques belonging to the second type yield relatively small circuits with high power dissipation. The majority of these techniques are NP-complete and require extremely large computation times for large flow table. This study considers the state assignment problem for circuits operating in the normal fundamental mode and describes a new procedure especially suited to the automated synthesis of large circuits. The proposed technique constitutes a trade-off between silicon area and power dissipation.
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