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An Autonomous, Self-Authenticating, and Self-Contained Secure Boot Process for Field-Programmable Gate Arrays

机译:用于现场可编程门阵列的自主,自认证和自包含安全启动过程

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Secure booting within a field-programmable gate array (FPGA) environment is traditionally implemented using hardwired embedded cryptographic primitives and non-volatile memory (NVM)-based keys, whereby an encrypted bitstream is decrypted as it is loaded from an external storage medium, e.g., Flash memory. A novel technique is proposed in this paper that self-authenticates an unencrypted FPGA configuration bitstream loaded into the FPGA during the start-up. The internal configuration access port (ICAP) interface is accessed to read out configuration information of the unencrypted bitstream, which is then used as input to a secure hash function SHA-3 to generate a digest. In contrast to conventional authentication, where the digest is computed and compared with a second pre-computed value, we use the digest as a challenge to a hardware-embedded delay physical unclonable function (PUF) called HELP. The delays of the paths sensitized by the challenges are used to generate a decryption key using the HELP algorithm. The decryption key is used in the second stage of the boot process to decrypt the operating system (OS) and applications. It follows that any type of malicious tampering with the unencrypted bitstream changes the challenges and the corresponding decryption key, resulting in key regeneration failure. A ring oscillator is used as a clock to make the process autonomous (and unstoppable), and a novel on-chip time-to-digital-converter is used to measure path delays, making the proposed boot process completely self-contained, i.e., implemented entirely within the re-configurable fabric and without utilizing any vendor-specific FPGA features.
机译:传统上,在现场可编程门阵列(FPGA)环境中的安全启动是使用硬连线的嵌入式加密原语和基于非易失性存储器(NVM)的密钥实现的,从而当从外部存储介质(例如,外部存储介质)中加载加密的比特流时,将对其解密。 ,闪存。本文提出了一种新颖的技术,该技术可以在启动过程中对未加密的FPGA配置位流进行自我认证,该位流将加载到FPGA中。访问内部配置访问端口(ICAP)接口以读取未加密比特流的配置信息,然后将其用作安全哈希函数SHA-3的输入以生成摘要。与传统的身份验证(摘要被计算并与第二个预先计算的值进行比较)相反,我们将摘要用作对硬件嵌入式延迟物理不可克隆功能(PUF)(称为HELP)的挑战。挑战敏感的路径的延迟用于使用HELP算法生成解密密钥。解密密钥在引导过程的第二阶段中用于解密操作系统(OS)和应用程序。由此可见,任何类型的恶意篡改未加密比特流都会改变质询和相应的解密密钥,从而导致密钥再生失败。环形振荡器用作时钟,以使过程独立(且不可中断),而新颖的片上时间数字转换器用于测量路径延迟,从而使所提出的引导过程完全独立,即,完全在可重新配置的结构中实现,而没有利用任何供应商特定的FPGA功能。

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