A low-cost and high-performance architecture for robust human detection using histogram of edge oriented gradients

摘要

Due to their programmability and hardware parallelism, field-programmable gate arrays (FPGAs) will be widely used to speed up edge/cloud computation on multiple image/video/big data processing systems and data centers. To the best of my knowledge, the implanted tiny-size application-specific integrated circuit (ASIC) will also be a promising solution for some computation-intensive but resource-limited scenarios, such as camera-based detection/recognition systems and battery-driven devices like wearable things.