Chemical vapor deposition of monolayer MoS_2 directly on ultrathin Al_2O_3 for low-power electronics

摘要

Monolayer MoS_2 has recently been identified as a promising material for high-performance electronics. However, monolayer MoS_2 must be integrated with ultrathin high-K gate dielectrics in order to realize practical low-power devices. In this letter, we report the chemical vapor deposition (CVD) of monolayer MoS_2 directly on 20 nm thick Al_2O_3 grown by atomic layer deposition (ALD). The quality of the resulting MoS_2 is characterized by a comprehensive set of microscopic and spectroscopic techniques. Furthermore, a low-temperature (200°C) A1_2O_3 ALD process is developed that maintains dielectric integrity following the high-temperature CVD of MoS_2 (800°C). Field-effect transistors (FETs) derived from these MoS_2/A1_2O_3 stacks show minimal hysteresis with a sub-threshold swing as low as ~220mV/decade, threshold voltages of ~2 V, and current I_(ON)/I_(OFF) ratio as high as ～10~4, where I_(OFF) is defined as the current at zero gate voltage as is customary for determining power consumption in complementary logic circuits. The system presented here concurrently optimizes multiple low-power electronics figures of merit while providing a transfer-free method of integrating monolayer MoS_2 with ultrathin high-k dielectrics, thus enabling a scalable pathway for enhancement-mode FETs for low-power applications.