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Endurance and Cycle-to-cycle Uniformity Improvement in Tri-Layered CeO2/Ti/CeO2 Resistive Switching Devices by Changing Top Electrode Material

机译:通过更改顶部电极材料来改善三层CeO2 / Ti / CeO2电阻开关器件的耐久性和周期间一致性

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摘要

Resistance switching characteristics of CeO2/Ti/CeO2 tri-layered films sandwiched between Pt bottom electrode and two different top electrodes (Ti and TaN) with different work functions have been investigated. RRAM memory cells composed of TaN/CeO2/Ti/CeO2/Pt reveal better resistive switching performance instead of Ti/CeO2/Ti/CeO2/Pt memory stacks. As compared to the Ti/CeO2 interface, much better ability of TaN/CeO2 interface to store and exchange plays a key role in the RS performance improvement, including lower forming/SET voltages, large memory window (~102) and no significant data degradation during endurance test of >104 switching cycles. The formation of TaON thinner interfacial layer between TaN TE and CeO2 film is found to be accountable for improved resistance switching behavior. Partial charge density of states is analyzed using density functional theory. It is found that the conductive filaments formed in CeO2 based devices is assisted by interstitial Ti dopant. Better stability and reproducibility in cycle-to-cycle (C2C) resistance distribution and Vset/Vreset uniformity were achieved due to the modulation of current conduction mechanism from Ohmic in low field region to Schottky emission in high field region.
机译:研究了夹在铂底电极和两个具有不同功函数的不同顶电极(Ti和TaN)之间的CeO2 / Ti / CeO2三层膜的电阻切换特性。由TaN / CeO2 / Ti / CeO2 / Pt组成的RRAM存储器单元具有更好的电阻切换性能,而不是Ti / CeO2 / Ti / CeO2 / Pt存储器堆栈。与Ti / CeO2接口相比,TaN / CeO2接口更好的存储和交换能力在RS性能的提高中起着关键作用,包括较低的成型/ SET电压,较大的存储窗口(〜10 2 ),并且在大于10 4 的开关周期的耐久测试中,数据没有明显下降。发现在TaN TE和CeO2膜之间形成TaON较薄的界面层是改善电阻切换性能的原因。使用密度泛函理论分析状态的部分电荷密度。发现在CeO2基器件中形成的导电丝由间隙Ti掺杂剂辅助。由于电流传导机制从低场区的Ohmic调制到高场区的肖特基发射,因此实现了更好的稳定性和可重复性(C2C)电阻分布和Vset / Vreset均匀性。

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