A way of FPGA implementation based on flow balanced technology is proposed. The core idea is increasing appropriately the buffer of link layer, at a fixed system operating frequency, to allocate the flow at each time point equally. The results show that the system automatically adjusts frame interval to send smoothly a test data stream according to external conditions. In the restriction of resources, keeping the system clock fixed, it is beneficial to synthesize high-performance FPCA design for large-scale logic application.%提出了一种基于流量均衡技术的FPGA实现方法,其核心思想是在固定的系统工作频率下,适当增加链路层缓冲区,把流量平均分配到各个时间点上.研究表明,该系统能根据外部条件自动调整帧间隔平稳发送测试数据流,在有限的资源下,系统时钟固定不变,FPGA综合布线容易且性能高,适用于大规模逻辑设计.
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