一种基于FPGA的PCIe总线及其DMA的设计方法

摘要

In order to realize the DMA function of PCIe bus, this paper introduces a design method of PCIe bus and the DMA function based on the Xilinx PCIe IP and related reference examples. Validation and test on hardware shows that the design has a high bandwidth that the bandwidth of DMA read and DMA write can achieve 554 MB/s and 881 MB/s respectively. It has been widely applied in practical engineering especially in high speed data acquisition system.%为实现 PCIe总线的 DMA功能，根据 Xilinx的 PCIe IP核以及相关参考例程，介绍一种 PCIe总线及其DMA 功能的设计方法。硬件验证与测试表明：该设计具有较高的带宽，DMA 读、写带宽可分别达到554 MB/s 和881 MB/s，目前已在实际工程中尤其是在高速数据采集系统中得到广泛应用。