数字基带传输系统的FPGA设计与实现

摘要

为了提高系统的集成度和可靠性,降低功耗和成本,增强系统的灵活性,提出一种采用非常高速积体电路的硬件描述语言(V HDL语言)来设计数字基带传输系统的方法.详细阐述数字基带传输系统中信号码型的设计原则,数字基带传输系统中信号编码原理和译码原理;采用硬件描述语言来设计数字基带信号编码器和译码器并进行仿真;采用原理图设计方法设计数字基带传输系统并仿真;整个系统的设计在Quartus Ⅱ平台上完成,并在Altera公司的ACEX1K-EPIK30TC144-1芯片上实现.%In order to improve system integration degree and system reliability, reduce power consumption and cost, and improve system flexibility, a method to design digital baseband system with hardware description language (VHDL) adopting the very higt-speed integrated circuit is put forward.The design principle of signal pettern in digital baseband system, the encoding and decoding principles of signal in the digital baseband system are elaborated.The encoder and the decoder for digital baseband signal were designed and simulated with VHDL.The digital baseband system was designed and simulated with schematic diagram design method.The design of the whole system is completed on the platform of ouartus Ⅱ and implemented with ACEX1K-EP1K30TC144-1 of Altera.