基于FPGA的面阵CCD成像系统设计

摘要

A novel CCD imaging system is designed by adopting interline transfer planar array CCD ICX415AL made by SONY as an imaging sensor, and taking FPGA chip EP1C12F256 made by Altera as CCD timing generator to drive signal. In the system, the correlated double sampling technology is adopted to eliminate the related noise in video signals to improve SNR, VHDL programming is used in the development environment of Quartus Ⅱ 9.1 and Modelsim SE 6.5 is employed to carry out simulation. The experimental results demonstrate that the designed time sequence can meet the demand of ICX415AL and out-puts 50 frames per second under 29.5 MHz clock-driven.%采用SONY行间转移型面阵CCD ICX415AL作为图像传感器,设计了一款新型CCD成像系统.以Altera公司的FPGA芯片EP1C12F256作为时序发生器产生CCD驱动信号.采用相关双采样技术滤除了视频信号中的相关噪声,提高信噪比.在Quartus Ⅱ 9.1开发环境下采用VHDL编程,并利用Modelsim SE 6.5仿真软件进行仿真测试.实验结果表明,所设计的时序满足ICX415AL的时序要求,在29.5 MHz的时钟驱动下,每秒输出50帧图片,能满足高速跟踪要求.