首页> 中文期刊> 《沈阳工业大学学报》 >全差分结构低功耗CMOS运算放大器设计

全差分结构低功耗CMOS运算放大器设计

         

摘要

为了减小低电源电压以及短沟道效应对放大器的影响,获得低电压高增益的放大器,提出了一种基于65 nm CMOS工艺技术的全差分运算跨导放大器(OTA).采用基于增益增强技术的折叠共源共栅拓扑结构,使放大器具有轨到轨输入及大输出摆幅特性,同时兼备高速、高增益及低功耗优点.电路仿真结果表明,其直流增益为82 dB,增益带宽为477 MHz,相位裕度为59°.正常工艺角下稳定时间为10 ns,稳定精度为0.05%,而功耗仅为4.8 mW.%In order to reduce the influence of low supply voltage and short channel effect on the amplifier and obtain an amplifier with low voltage and high gain, a fully differential operational transconductance amplifier ( OTA) based on a 65 nm CMOS technology was proposed. A folded-cascode structure with a gain enhancement technology was adopted, which made the amplifier have a rail to rail input and large output swing characteristics and such advantages as high speed, high gain and low power. The circuit simulation results show that the DC gain is 82 dB, the gain bandwidth is 477 MHz and the phase margin is 59°. In addition, the settling time is 10 ns and the settling accuracy is 0. 05% under the normal process angle, while the power consumption is only 4. 8 mW.

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