首页> 中文期刊> 《电子设计工程》 >一种快沿脉冲信号发生器的设计

一种快沿脉冲信号发生器的设计

         

摘要

For many fast edge pulse signal generators in home and abroad are bulky, expensive , poor reliability shortcomings etc, a fast edge pulse signal generator is designed. Using an idea of floating ground, PC can set amplitude and width through the PCI bus, and using FPGA to export a initial pulse. This initial puls alongs the regulative hardware, and driving the gate of MOSFET. The MOSFET is opened quickly, forming a fast edge pulse signal required. The test results show that the fast pulse generator has many characteristics such as small body, low price, high reliability etc,which can control the width and amplitude of the pulse.%针对目前国内外许多快沿脉冲信号发生器体积庞大、价格昂贵、可靠性差等缺点,设计了一种快沿脉冲信号发生器。采用浮地思想,上位机通过PCI总线,设置脉冲的幅度、脉冲宽度等参数,并控制FPGA输出脉冲源的原始脉冲,原始通过光电耦合器、功率管驱动芯片等硬件调理电路调理后,驱动功率MOSFET的栅极,让其迅速打开,形成所需的快沿脉冲信号。测试结果证明,该快沿脉冲发生器具有体积小、成本低、可靠性高等特点,并且可实现对脉冲信号的幅度、脉冲宽度的调节。

著录项

相似文献

  • 中文文献
  • 外文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号