基于FPGA的FFT算法设计与实现

摘要

提出一种基于FPGA实现32点实序列FFT的设计方法，采用基二时间抽取算法以及并行迭代处理方案。选择Altera公司Cyclone IV系列芯片，并用Verilog HDL完成设计输入。最后通过Signal Tap与Matlab数据对比发现，该设计可以实现对高速A/D采样数据的实时、准确处理。%A design method of 32-point real sequence fast Fourier transform (FFT) based on field programma⁃ble gate array (FPGA) is presented. Base-2 DIT algorithm and parallel iterative processing scheme are adopted. Cy⁃clone IV series chip of Altera company is chosen and Verilog HDL input method is used to implement design input. It is found that the design can achieve high speed A/D sampling data processing accurately and in real time through contrast of signal tap and Matlab data.