基于FPGA的高速模拟信号采集卡设计

摘要

Signal acquisition is an important part of the test system. This paper presents a FPGA-based signal acquisition board, using Verilog HDL to achieve the internal logic circuit design, using AD7938 to achieve ADC sampling module. The transmission bus selects BLVDS. The FPGA completes receiving and sending data on the BLVDS bus, and also completes the data cache. PC instruction and feedback data in accordance with Modbus protocol for transmission, C8051F120 completes reading the data of the FPGA internal BLVDS receiver buffer, controls the control register of the AD7938 and the shadow register according to the host computer command, also starts BLVDS drive circuit for data delivery. The results show that, communication is high-speed, stable and reliables the results collected are controlled in the range of ± 0. 10V allowed.%测试系统中的信号采集是系统的一个重要环节；文章提出了一种基于FPGA的高速模拟信号采集卡,采用Verilog HDL实现FPGA内部逻辑电路设计,采用AD7938实现ADC采样模块;总线选择BLVDS,FPGA完成BLVDS总线上数据的接收、发送以及数据的缓存,上位机指令和板卡反馈数据依照Modbus协议进行传输,C8051F120完成对FPGA内部BLVDS接收电路缓存数据的读取,根据上位机指令对AD7938控制寄存器以及影子寄存器进行控制,并启动BLVDS驱动电路完成数据的发送；实验结果表明:通信速度快、稳定、可靠,电压采集的结果控制在士0.10V允许范围内.