School of Electrical and Information Engineering;
Tianjin University;
Tianjin 300072;
China;
Department of Electrical and Computer Engineering;
Sir Syed CASE Institute of Technology;
Islamabad 44000;
Pakistan;
Universidad Carlos III de Madrid;
Av.Universidad 30;
Leganés;
Madrid 28005;
Spain;
viterbi decoder; on-board processing; FPGA; user memory; fault tolerance; single event upsets;