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Indium gallium arsenide resistive-gate charge-coupled devices.

机译:砷化铟镓电阻栅电荷耦合器件。

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摘要

InGaAs based charge-coupled devices (CCDs) are investigated with focus on resistive-gate CCDs (RGCCDs) employing an InGaAs channel for both high speed analog signal processing and imaging applications. A buried channel and a two-dimensional electron gas (2DEG) RGCCD structure are demonstrated.;The buried channel device uses InAlAs as a barrier height enhancement layer and is arranged as a four-phase RGCCD, using cermet as the resistive material. Operation between 13 MHz and 1 GHz at room temperature exhibits a 0.98 charge transfer efficiency (CTE). Cooling the device to about 200 K results in an increased CTE of 0.99 at 13 MHz. The primary performance limitation is identified as the mesa sidewall leakage current and several methods of solving this problem are proposed and attempted.;The 2DEG structure is a planar-doped device, also arranged as a four-phase RGCCD with a cermet resistive layer. The planar-doped 2DEG InGaAs RGCCD exhibits greater than 0.999 CTE between 20 MHz and 26 MHz, the upper frequency limit for the low-speed test station. CTE degradation below 20 MHz is attributed to gate leakage current. The relative clock biasing arrangement is shown to be critical for high performance operation, and high performance gigahertz range operation is impeded by present bias limitations.;A semiconductor resistive-gate CCD (SRGCCD) structure is proposed and investigated. In conjunction, an heterojunction internal photoemission CCD is suggested as a direct application of the (SRGCCD). The SRGCCD uses a lattice mismatched InGaAs/AlGaAs heterojunction with mismatched InGaAs acting as a semiconductor resistive gate and GaAs as the channel material. The material and electrical properties of this heterojunction are studied, indicating the ability of the gate to modulate the channel potential and an associated 0.8 eV barrier height. Operation of a SRGCCD indicates poor performance, and an explanation is proposed which suggests an inherent limitation in the SRGCCD device structure and operation. A semiconductor capacitive-gate CCD remains a viable alternative.;A general relationship between the charge capacity of a four-phase resistive-gate CCD structure and the clock voltage swing is derived for the buried channel structure. This relationship is significant for optimum RGCCD device design and layout with respect to speed and dynamic range.
机译:对基于InGaAs的电荷耦合器件(CCD)进行了研究,重点是采用InGaAs通道的电阻栅CCD(RGCCD),用于高速模拟信号处理和成像应用。演示了掩埋沟道和二维电子气(2DEG)RGCCD结构。掩埋沟道器件使用InAlAs作为势垒高度增强层,并使用金属陶瓷作为电阻材料布置为四相RGCCD。室温下在13 MHz至1 GHz之间运行时,电荷转移效率(CTE)为0.98。将器件冷却至约200 K,可在13 MHz时将CTE提高到0.99。主要的性能限制被确定为台面侧壁泄漏电流,并提出并尝试了解决该问题的几种方法。2DEG结构是一种平面掺杂的器件,也布置为带有金属陶瓷电阻层的四相RGCCD。平面掺杂的2DEG InGaAs RGCCD在20 MHz和26 MHz之间表现出大于0.999的CTE,这是低速测试站的上限频率。低于20 MHz的CTE劣化归因于栅极泄漏电流。相对时钟偏置装置被证明对高性能工作至关重要,而目前的偏置限制阻碍了高性能千兆赫兹范围的工作。结合起来,建议将异质结内部光发射CCD作为(SRGCCD)的直接应用。 SRGCCD使用晶格失配的InGaAs / AlGaAs异质结,其中InGaAs失配用作半导体电阻栅极,GaAs作为沟道材料。研究了该异质结的材料和电性能,表明了栅极调节沟道电势的能力以及相关的0.8 eV势垒高度。 SRGCCD的操作表明性能较差,并提出了一种解释,暗示了SRGCCD器件结构和操作的固有局限性。半导体电容栅CCD仍然是可行的选择。对于掩埋沟道结构,推导了四相电阻栅CCD结构的电荷容量与时钟电压摆幅之间的一般关系。这种关系对于优化RGCCD器件的设计和布局在速度和动态范围方面具有重要意义。

著录项

  • 作者

    Rossi, David V.;

  • 作者单位

    Columbia University.;

  • 授予单位 Columbia University.;
  • 学科 Engineering Electronics and Electrical.;Physics Electricity and Magnetism.
  • 学位 Ph.D.
  • 年度 1992
  • 页码 164 p.
  • 总页数 164
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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