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Non-contact critical dimension metrology sensor for chrome photomasks implemented using a low-temperature co-fired ceramic technology.

机译:用于铬光掩模的非接触式临界尺寸计量传感器,采用低温共烧陶瓷技术实现。

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摘要

Integrated circuit fabrication techniques rely on optical microlithography, an optical technique that has been used to transfer the patterns from the photomask to the silicon wafer since shortly after the invention of the integrated circuit (IC) in 1958. More than four decades later, optical lithography is still the key enabler and driver for the semiconductor industry and continues to be the desired mainstream approach because of its cost effectiveness, even though lithography represents over thirty-five percent of the chip manufacturing cost.;However, the International Technology Roadmap for Semiconductors (ITRS) has warned that the photomask industry is falling behind the requirements of the chipmakers, especially in the areas of process control and metrology. Development of photomask process metrology infrastructure to achieve critical dimension (CD) control is essential to support the technical and manufacturing needs of optical lithography below 100 nm.;This dissertation describes a fast, reliable, and low cost non-contact metrology technique developed as an alternative to existing CD measurement equipment such as scanning electron microscopy (SEM), atomic force microscopy (AFM) or optical microscopy. The metrology sensor is based on a measurement of capacitance, which is a linear function of the CD. Thus, by using a calibration algorithm, the capacitance measurement can be automatically converted into a linewidth value.;The metrology sensor has been fabricated using a Low Temperature Co-Fired Ceramic (LTCC) technology, which allows for a reduction of parasitic capacitances while minimizing fabrication costs. Because particle contamination is a critical concern, the metrology sensor and the chrome photomasks are never in contact. Capacitance measurements are performed at room temperature in order to minimize steps during the inspection phase.;Finally, this dissertation describes test structures printed on photomasks and the CDs extracted when using this metrology technique.
机译:集成电路制造技术依赖于光学微光刻,该光学技术自1958年集成电路(IC)发明不久后就被用于将图案从光掩模转移到硅晶片上。四十年后,光学光刻尽管光刻技术占芯片制造成本的百分之三十五以上,但它仍然是半导体行业的主要推动者和推动力,并且由于其成本效益而仍然是人们所期望的主流方法。但是,《国际半导体技术路线图》( ITRS)警告说,光掩模行业正在落后于芯片制造商的要求,特别是在过程控制和计量领域。开发光掩模工艺计量基础设施以实现关键尺寸(CD)控制对于支持100 nm以下的光学光刻技术和制造需求至关重要。本论文描述了一种快速,可靠且低成本的非接触式计量技术替代现有CD测量设备,例如扫描电子显微镜(SEM),原子力显微镜(AFM)或光学显微镜。计量传感器基于电容的测量,电容是CD的线性函数。因此,通过使用校准算法,可以将电容测量值自动转换为线宽值。计量传感器是使用低温共烧陶瓷(LTCC)技术制造的,该技术可在减少寄生电容的同时将其最小化制造成本。因为颗粒污染是一个关键问题,所以度量传感器和铬光罩永远不会接触。电容测量在室温下进行,以最大程度地减少检查阶段的步骤。最后,本文介绍了印刷在光掩模上的测试结构以及使用这种计量技术提取的CD。

著录项

  • 作者单位

    The George Washington University.;

  • 授予单位 The George Washington University.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 D.Sc.
  • 年度 2002
  • 页码 120 p.
  • 总页数 120
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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