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Electrical characterization of silicon-on-insulator wafers.

机译:绝缘体上硅片的电特性。

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摘要

Silicon-on-Insulator (SOI) metal oxide semiconductor field effect transistors (MOSFET) have become a common subject in the semiconductor community due to enhanced performance such as simple processing, excellent scalability, sharp subthreshold characteristics, minimum short-channel effects, and reduced hot electron degradation. Since these films are used for devices, it is necessary to know the SOI film quality with simple and nondestructive methods. In this study, surface photovoltage (SPV) measurements, pseudo-MOSFET characterization, and capacitance-voltage (C-V) are used. Literature review and simulations show that material properties of SOI wafers can have significant effects on the device and circuit performance such as floating body effects, switching speed, leakage current, and noise characteristics. SPV results show the surface charges of SOI wafers to increase with frequency in the low frequency region, with several interface components acting in opposing directions.{09}Iron contaminated wafers show increased surface charges due to a high density of interface states. The efficacy of surface passivation is clearly shown by measuring the effective generation lifetime as a function of time after applying the liquid to the pseudo-MOSFET surface. A more controlled method is the additional top gate controlling either the upper or lower silicon film surface, separately. C-V measurements for some SOI wafers show a leaky buried oxide (BOX) and high density of interface states. SOI wafers can exhibit quite different breakdown voltage before and after removing the Si layer, indicating that the gate current flows through weaker current paths in the BOX beyond the gate area. Transmission electron microscopy (TEM) images display smooth interfaces and a clean BOX, regardless of the breakdown voltage.
机译:绝缘体上硅(SOI)金属氧化物半导体场效应晶体管(MOSFET)由于具有增强的性能,例如简单的工艺,出色的可扩展性,清晰的亚阈值特性,最小的短沟道效应以及减小的性能,已成为半导体领域的常见课题。热电子降解。由于这些膜是用于设备的,因此有必要使用简单且无损的方法来了解SOI膜的质量。在这项研究中,使用了表面光电压(SPV)测量,伪MOSFET表征和电容电压(C-V)。文献综述和仿真表明,SOI晶片的材料特性会对器件和电路性能产生重大影响,例如浮体效应,开关速度,漏电流和噪声特性。 SPV结果显示SOI晶片的表面电荷在低频区域随频率增加,并且多个界面组件在相反的方向上起作用。{09}受铁污染的晶片由于界面状态的密度高而显示出增加的表面电荷。通过在将液体施加到伪MOSFET表面后,测量有效生成寿命与时间的函数关系,可以清楚地显示出表面钝化的功效。受到更多控制的方法是附加的顶栅分别控制上或下硅膜表面。某些SOI晶圆的C-V测量显示泄漏的掩埋氧化物(BOX)和高界面密度。 SOI晶圆在去除Si层之前和之后可能表现出截然不同的击穿电压,这表明栅极电流流过BOX中较弱的电流路径,超出了栅极区域。不论击穿电压如何,透射电子显微镜(TEM)图像均显示平滑的界面和干净的BOX。

著录项

  • 作者

    Kang, Sunggun.;

  • 作者单位

    Arizona State University.;

  • 授予单位 Arizona State University.;
  • 学科 Engineering Electronics and Electrical.; Engineering Materials Science.
  • 学位 Ph.D.
  • 年度 2002
  • 页码 124 p.
  • 总页数 124
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;工程材料学;
  • 关键词

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