Circuit and packet transport mechanisms for HORNET-class optical networks.

摘要

Optical communications systems are an integral part of the Internet today. It is the only transmission technology that can deliver the link capacity necessary for the backbone and metropolitan area networks. The current solution for delivering Internet content in the metro area largely evolved from telephony systems designed to transmit digitized voice across an optical link. A fairly new solution for the metro area, the Resilient Packet Ring (RPR), is emerging from the IEEE 802.17 working group. RPR is expected to better support the increasing amount of bursty IP data traffic. Looking into the not-so-distant future, it is clear that IP data traffic will continue to increase at a quick pace forcing metro networks to scale to 100s of Gbps capacities. Current and upcoming solutions for the metro area will have to use wavelength division multiplexing (WDM) to add capacity. Brute-force WDM architectures require an excessive amount of optical-to-electrical and electrical-to-optical converters and high-speed line cards. Thus a new architecture will be necessary to deliver 100s of Gbps over metro rings while still allowing network operators to compete in cost-sensitive markets.; HORNET is a new metro network solution that scales inexpensively to 100s of Gbps. This architecture has been developed at Stanford University's Photonics and Networking Research Laboratory (PNRL). The architecture uses fast-tunable packet transmitters and dynamic wavelength routing to eliminate the need for excessive amounts of equipment at network nodes. The design of the HORNET architecture is presented in this dissertation. A media access control protocol that combines a unique blend of solutions at the physical layer and the data-link layer in order to support guaranteed bit-rate circuits as well as best-effort packet services simultaneously is developed. A custom simulator is built to evaluate key portions of the MAC. The subsystems required to realize the HORNET architecture are described and the design of a fast-tunable transmitter is developed in this dissertation. Additionally, a laboratory experimental testbed has been built to investigate and demonstrate key properties of HORNET and show the feasibility of the new architecture.