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Dynamically Reconfigurable Management of Energy, Performance, and Accuracy applied to Digital Signal, Image, and Video Processing Applications.

机译:动态可重新配置的能量,性能和准确性管理,应用于数字信号,图像和视频处理应用程序。

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摘要

There is strong interest in the development of dynamically reconfigurable systems that can meet real-time constraints in energy/power-performance-accuracy (EPA/PPA). In this dissertation, I introduce a framework for implementing dynamically reconfigurable digital signal, image, and video processing systems.;The basic idea is to first generate a collection of Pareto-optimal realizations in the EPA/PPA space. Dynamic EPA/PPA management is then achieved by selecting the Pareto-optimal implementations that can meet the real-time constraints. The systems are then demonstrated using Dynamic Partial Reconfiguration (DPR) and dynamic frequency control on FPGAs.;The framework is demonstrated on: (i) a dynamic pixel processor, (ii) a dynamically reconfigurable 1-D digital filtering architecture, and (iii) a dynamically reconfigurable 2-D separable digital filtering system.;Efficient implementations of the pixel processor are based on the use of look-up tables and local-multiplexes to minimize FPGA resources. For the pixel-processor, different realizations are generated based on the number of input bits, the number of cores, the number of output bits, and the frequency of operation. For each parameters combination, there is a different pixel-processor realization. Pareto-optimal realizations are selected based on measurements of energy per frame, PSNR accuracy, and performance in terms of frames per second. Dynamic EPA/PPA management is demonstrated for a sequential list of real-time constraints by selecting optimal realizations and implementing using DPR and dynamic frequency control.;Efficient FPGA implementations for the 1-D and 2-D FIR filters are based on the use a distributed arithmetic technique. Different realizations are generated by varying the number of coefficients, coefficient bitwidth, and output bitwidth. Pareto-optimal realizations are selected in the EPA space. Dynamic EPA management is demonstrated on the application of real-time EPA constraints on a digital video.;The results suggest that the general framework can be applied to a variety of digital signal, image, and video processing systems. It is based on the use of offline-processing that is used to determine the Pareto-optimal realizations. Real-time constraints are met by selecting Pareto-optimal realizations pre-loaded in memory that are then implemented efficiently using DPR and/or dynamic frequency control.
机译:人们对动态可重配置系统的开发非常感兴趣,这些系统可以满足能源/功率性能准确度(EPA / PPA)的实时限制。在本文中,我介绍了一个用于实现可动态重构的数字信号,图像和视频处理系统的框架。基本思想是首先在EPA / PPA空间中生成帕累托最优实现的集合。然后,通过选择可以满足实时约束的帕累托最优实施方案来实现动态EPA / PPA管理。然后在FPGA上使用动态部分重配置(DPR)和动态频率控制对系统进行了演示;该框架在以下方面进行了演示:(i)动态像素处理器,(ii)动态可重配置的一维数字滤波架构,以及(iii动态可重构的二维可分离数字滤波系统。像素处理器的有效实现基于查找表和本地多路复用的使用,以最大程度地减少FPGA资源。对于像素处理器,基于输入位数,内核数,输出位数和操作频率来生成不同的实现。对于每个参数组合,都有不同的像素处理器实现。基于对每帧能量,PSNR精度和每秒帧数的性能的测量来选择Pareto最佳实现。通过选择最佳实现并使用DPR和动态频率控制来实现,动态EPA / PPA管理可针对实时约束的顺序列表进行演示;针对一维和二维FIR滤波器的高效FPGA实现基于分布式算术技术。通过改变系数的数量,系数位宽和输出位宽可以生成不同的实现。在EPA空间中选择了帕累托最优实现。通过将实时EPA约束条件应用于数字视频,演示了动态EPA管理。结果表明,该通用框架可应用于各种数字信号,图像和视频处理系统。它基于离线处理的使用,该离线处理用于确定Pareto最佳实现。通过选择预加载到内存中的帕累托最优实现方式来满足实时约束条件,然后使用DPR和/或动态频率控制有效地实现这些实现。

著录项

  • 作者

    Llamocca, Daniel.;

  • 作者单位

    The University of New Mexico.;

  • 授予单位 The University of New Mexico.;
  • 学科 Engineering Computer.;Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2012
  • 页码 157 p.
  • 总页数 157
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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