2.4G/5GHz dual-band RF transceiver front-end design for WLAN.

摘要

A 2.4G/5GHz dual-band RF transceiver for Wireless LAN (IEEE802.11a/b/g) application is proposed. The transceiver adopts direct conversion architecture, targeting system on one chip implementation. Sub-harmonic technique is introduced to alleviate DC offset problem, the intrinsic drawback coming along with the zero-IF system. The advantage of SiGe HBT is taken at most to boost the performance of design, particularly in the above 2GHz range RF signal processing. Critical receiver front-end building blocks, such as LNA, Mixer, VCO, and Bandgap reference are designed, fabricated and tested. As a preliminary work of RFICs development in Integrated Electronics Laboratory, this work develops the complete design flow methodology of RFICs, including initial IC process selection, design environment setup, system architecture definition, individual building block design, evaluation board development, and on-board/on-wafer experimental testing.