System/architecture level design and modeling of mixed-signal SoC using SystemC/SystemC-AMS and cross-layer co-simulation tool.

摘要

Our world is an analog world, and the ways in which we interact with it are also analog. Today, more integrated circuits and systems contain analog components. Meanwhile, digital functionalities are increasingly put into analog systems to enhance their performance. System-On-Chip designs consisting of analog, digital, RF and software blocks are commonplace.;New technologies allow for the integration of as many features as possible on one or more silicon die. At the same time, integrated systems have had to become more flexible to cover a wider range of use-cases, as heavily increasing design and production set-up costs have made highly targeted application-specific design more difficult to justify. Also, the reliability of today's electronic systems has been challenged by the increasing probability of device failure as the feature sizes of integrated circuits are pushed well into the nanometer scale range and three-dimensional geometry is explored to extend VLSI process potential. The combined effect of a continually increased presence of analog circuits and IP blocks in a system as well as the coupling between densely integrated components/subsystems has an impact to the operation reliability and performance that is too complex at the transistor level.;Electronic system level design/verification is now an established approach at most of the world's leading semiconductor companies and is being adopted increasingly to solve the complex mixed-signal System-On-Chip (SoC) problem at early stages, leading to a shorter design period. From noise, some typical mixed-signal circuits, to a whole application SoC---a Near Field Communication system, SystemC/SystemC-AMS shows its powerful feature as an ESL design language. In this dissertation, I will discuss examples modeled at the system level in detail.;On the other hand, it is often difficult to develop a high-level model at the appropriate abstraction level that can ensure the best trade-off between architectural details and simulation speed. To this end, engineers perform simulations at different levels. Because of that, we developed a Cross-Layer Simulator which is shown in this document. This co-simulator, based upon Ngspice and SystemC/SystemC-AMS, can handle a mixed-signal SoC at different abstraction levels in one model and simulation. Case studies on different circuits prove its ability to function well in terms of both precision and speed for circuits/systems simulation.