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Reconfigurable computing for algorithms in hyperspectral image processing.

机译:用于高光谱图像处理中算法的可重构计算。

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This dissertation investigates the applications of hyperspectral image processing algorithms in recently reconfigurable DSP systems. To date, engineers have been using the Field Programmable Gate Array (FPGA) as the core processing element of most reconfigurable computers. These FPGA-built processing elements completely avoid the instruction-fetch, load/store bottlenecks of the conventional von Neumann architectures in most general purpose processors and DSP processors. FPGA-based systems truly achieve parallel processing, executing algorithms based on the inherent parallelism of the hardware. In addition, FPGAs are far more scalable into the higher throughput realms because of their dedicated logic for I/O functions which is of particular importance when dealing with data from sensor imaging systems. In this dissertation, two hyperspectral image processing algorithms, Adaptive Causal Anomaly Detection (ACAD) used for anomaly detection and Block-of-Skewer based Pixel Purity Index (BOS-PPI) for endmember extraction will be investigated. Each of them demonstrates different level of challenging tasks to be resolved in the reconfigurable computing environment. For the ACAD algorithm the major challenge of its FPGA implementation is the calculation of the inverse of correlation matrix in near real-time. Since Hyperspectral image data are collected by hundreds or thousands of spectral bands, their large scale sample correlation matrices require a vast amount of time to calculate its inversion. In order to cope with this problem, the QR-Decomposition based matrix inversion is implemented via the COordinate Rotation DIgital Computer (CORDIC). In addition, the Matrix Inversion Lemma (MIL) is also used to reduce the computational complexity induced by the near real-time matrix inversion computation. As for the Block-of-Skewers based PPI, its FPGA implementation is focused on systolic array design due to its inherent parallelism. Several different block designs will be implemented and compared in this dissertation. The FPGA design in this research work sets a stage towards future development of new reconfigurable systems for on-board and real-time processing of many hyperspectral image processing algorithms.
机译:本文研究了高光谱图像处理算法在最近可重构DSP系统中的应用。迄今为止,工程师一直在使用现场可编程门阵列(FPGA)作为大多数可重配置计算机的核心处理元素。这些由FPGA构建的处理元件完全避免了大多数通用处理器和DSP处理器中传统冯·诺依曼架构的指令获取,加载/存储瓶颈。基于FPGA的系统真正实现了并行处理,并基于硬件固有的并行性执行算法。另外,由于FPGA具有专用于I / O功能的逻辑,因此FPGA在更高的吞吐量领域具有更大的可扩展性,当处理来自传感器成像系统的数据时,FPGA尤其重要。本文研究了两种高光谱图像处理算法:用于异常检测的自适应因果异常检测(ACAD)和用于末端成员提取的基于串块的像素纯度指数(BOS-PPI)。他们每个人都展示了在可重新配置的计算环境中要解决的不同级别的挑战性任务。对于ACAD算法,其FPGA实现的主要挑战是近实时地计算相关矩阵的逆。由于高光谱图像数据是由数百或数千个光谱带收集的,因此它们的大规模样本相关矩阵需要大量时间来计算其反演。为了解决这个问题,通过坐标旋转数字计算机(CORDIC)实现了基于QR分解的矩阵求逆。此外,矩阵求逆引理(MIL)也用于减少由近实时矩阵求逆计算引起的计算复杂性。至于基于串块的PPI,由于其固有的并行性,其FPGA实现专注于脉动阵列设计。本文将实现和比较几种不同的模块设计。这项研究工作中的FPGA设计为新的可重配置系统的未来开发奠定了基础,该系统可用于许多高光谱图像处理算法的板载和实时处理。

著录项

  • 作者

    Hsueh, Mingkai.;

  • 作者单位

    University of Maryland, Baltimore County.$bEngineering, Computer.;

  • 授予单位 University of Maryland, Baltimore County.$bEngineering, Computer.;
  • 学科 Engineering Electronics and Electrical.; Computer Science.
  • 学位 Ph.D.
  • 年度 2007
  • 页码 120 p.
  • 总页数 120
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;自动化技术、计算机技术;
  • 关键词

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