More Than Density: Pattern Dependencies in the Copper Era

摘要

This paper explores causes and effects of pattern dependencies in copper interconnect variability, specifically thickness variability related to electro-chemical deposition (ECD) and chemical-mechanical polishing (CMP). Various pattern dependencies of these processes are outlined, showing they consist of more than density, which is the typical concern addressed in the design process. The interplay between ECD and CMP is described, as well as the effects of this interplay on final copper thickness variation. We then show differences between dependencies on test chips and product chips. Consequently, we discuss problems with existing test chip designs and outline a second-generation test chip with additional structures known to be causes of variation. The difficulties in attributing pattern dependencies in copper to simplistic layout parameters are highlighted. It is then discussed whether design rules based on these simplistic parameters are becoming obsolete. Finally, it is suggested that full-chip copper process modeling provides a comprehensive solution addressing copper thickness variability.